Job Purpose
–
Principal Accountabilities
• DFT Implementation
– SCAN insertion / ATPG / Scan Simulation (Test Compiler / TetraMax)
– BIST/BIRA Insertion & Simulation : Tessent MBIST / JTAG / IJTAG
– Advanced DFT : 3D-IC, ISO26262, scan dump
– Hierarchical DFT Flow
– TOP DFT Architecture Design
– ATE Vector setup
– Yield improve
• SDC Creation & Clean
• Spyglass LINT/SDC/DFT Check
• Logic Synthesis : DC/DCT/DCG
• Equivalence Check : Formality/Conformal
• STA (Static Timing Analysis)
• Simulator & Debugger : VCS / NC-verilog / Verdi
Qualifications
• 전기전자/컴퓨터공학 학사 후 경력 5 년 이상 또는 석사 후 경력 3 년 이상
• DFT 설계 업무 경력 3 년 이상
• SOC 설계 flow 및 설계 방법론에 대한 이해
• STA (Static Timing Analysis) constraints 및 SDF simulation 에 대한 경험
• Verilog, SystemVerilog 를 활용한 RTL 논리회로 설계 경험
• DFT specification 을 이해 및 결정하고 회로로 구현할 수 있는 능력
About SEMIFIVE
Founded in Seoul in 2018, SEMIFIVE is basing its foundation on Korea’s semiconductor design competency that was amassed for more than 20 years. With expertise in front-end to back-end design, SEMIFIVE has become the fastest-growing silicon design company that offers the most comprehensive design solutions. SEMIFIVE’s core business is its innovative Platform SoC that enables low-cost & high-efficiency SoC design, and also provides various design solutions for global customers through its diverse network. As the cost of developing an SoC and the demand for customized silicon continue to grow rapidly, SEMIFIVE’s Platform SoC will play a key role in turning innovative ideas into silicon.
SEMIFIVE, hand in hand with global innovation leaders, is growing as a leading partner for future SoC designs, and thereby becoming: The New Global Hub of Custom Silicon.