{"id":897,"date":"2019-10-14T21:00:13","date_gmt":"2019-10-14T21:00:13","guid":{"rendered":"https:\/\/semifive.com\/?post_type=updates&#038;p=897"},"modified":"2025-12-31T16:14:30","modified_gmt":"2025-12-31T07:14:30","slug":"samsung-to-fabricate-risc-v-chip-with-14lpp-in-partnership-with-semifive","status":"publish","type":"updates","link":"https:\/\/semifive.com\/ko\/company\/newsroom\/updates\/samsung-to-fabricate-risc-v-chip-with-14lpp-in-partnership-with-semifive\/","title":{"rendered":"Samsung To Fabricate RISC-V Chip With 14LPP In Partnership With SemiFive"},"excerpt":{"rendered":"<p>One such firm is SemiFive, which hopes to take the reduced instruction set world by storm through its products. Now, we&#8217;ve learned that Samsung will fabricate a SoC using SiFive IP on the 14nm Low Power Plus node.<\/p>\n","protected":false},"featured_media":0,"template":"","class_list":["post-897","updates","type-updates","status-publish","hentry"],"acf":{"featured_post":""},"_links":{"self":[{"href":"https:\/\/semifive.com\/ko\/wp-json\/wp\/v2\/updates\/897","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/semifive.com\/ko\/wp-json\/wp\/v2\/updates"}],"about":[{"href":"https:\/\/semifive.com\/ko\/wp-json\/wp\/v2\/types\/updates"}],"wp:attachment":[{"href":"https:\/\/semifive.com\/ko\/wp-json\/wp\/v2\/media?parent=897"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}